Nunez - Yanez , J . , & Farhadi Beldachi , A . F . ( 2014 ) . Run - time power and performance scaling with CPU - FPGA hybrids . In 2014 NASA / ESA

This paper investigates how a wide dynamic range of performance and power levels can be obtained in commercially available state-of-the-art hybrid FPGAs that include embedded processors. Adaptive voltage and frequency scaling obtained with embedded in-situ detectors is employed to scale performance and power in the FPGA fabric under processor control. The results show that it is possible to obtain energy savings higher than 60% or alternatively double performance at nominal energy. The available voltage and frequency margins create a large number of performance and energy states with scaling possible at run-time with low overheads. Keywords— FPGA, energy efficient design, adaptive voltage scaling, energy propotional computing